1. Field of the Disclosure
This disclosure generally relates to a semiconductor device and, more particularly, to a thin film transistor device.
2. Description of the Related Art
Referring to FIG. 1, it shows a cross-sectional view of the conventional thin film transistor 9, which includes a substrate 91, a gate electrode 92, an insulating layer 93, a channel layer 94, a source electrode 95 and a drain electrode 96.
The operation of the thin film transistor 9 is to electrically turn on or turn off the channel layer 94 by controlling the voltage on the gate electrode 92. When the channel layer 94 is turned on, display data is sent from the source electrode 95 to the drain electrode 96 so that image data can be shown. When the channel layer 94 is turned off, the display data can not be sent to the drain electrode 96 from the source electrode 95 so that the image data can not be shown.
In the conventional thin film transistor 9, the channel layer 94 is made of amorphous silicon. However, it is known that the amorphous thin film transistor has a lower mobility and reliability. Accordingly, in recent years, so called metal oxide semiconductor thin film transistor is provided in which the channel layer is made of metal oxide semiconductor.
However, simply replacing the channel layer 94 in FIG. 1 by the metal oxide can have following problems. As the source electrode 95, the drain electrode 96 and the channel layer 94 have a lower etching selectivity, and the source electrode 95 and the drain electrode 96 are formed after the channel layer 94, the channel layer 94 can be over-etched to degrade the operating performance thereof when etching the source electrode 95 and the drain electrode 96. In addition, in the structure shown in FIG. 1, the source electrode 95 and the drain electrode 96 are formed by the same manufacturing process so that they are at the same plane, and thus it is difficult to increase the channel width/length ratio (W/L) of the active layer.
Accordingly, the present disclosure further provides a thin film transistor structure that may effectively prevent the metal oxide semiconductor channel layer from being affected by the etching liquid during manufacturing and may increase the channel width/length ratio.